Memory devices (semiconductor integrated circuit devices) in which phase-change elements, which are nonvolatile memory elements, and transistors (or selectors) are integrated on a semiconductor substrate have been proposed. In general, such memory devices comprising phase-change elements are referred to as PCMs or PRAMs, which are the initials for phase-change memories or phase-change random access memories. Moreover, superlattice phase-change memories (superlattice memories, interfacial PCMs or iPCMs) in which GeTe and Sb2Te3, which are materials of phase-change elements of the PCMs, are stacked in layers have been proposed.
To increase the integration density of the PCMs (PRAMs) and the iPCMs, it is necessary to reduce the areas (footprints) of the transistors (or the selectors). However, when the areas are reduced, a driving force, that is, a driving current, decreases. It is therefore necessary that the resistance of phase-change materials be changeable even by a small driving current. A driving current is effectively made smaller by increasing the resistance of a resistance-change layer. In fact, it has been reported that in an iPCM, the lower the resistance in a SET state (low-resistive state) is, the smaller a necessary RESET current is. Heat is necessary when a PCM or an iPCM transitions between a low-resistive state (LRS) and a high-resistive state (HRS). Incidentally, in the case of a highly integrated element, heat produced at the time of writing may affect an adjacent cell to cause a writing error. It is therefore hard to prevent adjacent cells from interfering with each other in an element which produces much heat. Heat and power produced at the time of rewriting is proportional to V2/R. Thus, with the same rewrite voltage, the higher the resistance is, the smaller the amount of produced heat is. The prevention of a writing error thereby can be expected. Therefore, memory devices comprising nonvolatile memory elements having high resistance have been desired.
An iPCM transitions between an LRS (SET) and an HRS (RESET) with a GeTe layer in a crystalline state. On the other hand, a superlattice-like phase-change memory (superlattice-like PCM or SLL-PCM) which transitions between an LRS and an HRS when a GeTe layer transitions between crystalline and noncrystalline states also has been proposed. It has been reported that in the SLL-PCM, biaxial strain occurring in an interface because of a difference in lattice constant between GeTe and Sb2Te3, etc., influences the movement of Ge, and the greater the strain is, the more easily Ge atoms move. The iPCM also transitions between LRS and HRS states because of the movement of Ge atoms. Thus, as in the case of the SLL-PCM, also in the iPCM, the application of strain to a GeTe layer facilitates the movement of Ge atoms and a SET/RESET operation. A reduction in operating temperature, that is, a reduction in current and power consumption in SET/RESET transition, thereby can be expected.